Computer Architecture MCQs – Practice Test 6 (Chapter 15)

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Pipelining in Computer Architecture MCQ – Practice Test 6 PDF Download

MCQ 26: To solve the problems with a simple hardware technique called forwarding, also known as:

bypassing
short-circuiting
stalling
both a and b

MCQ 27: Every MIPS instruction can be implemented at most:

2 clock cycles
3 clock cycles
4 clock cycles
5 clock cycles

MCQ 28: Code containing redundant loads, stores, and other operations that might be eliminated by an optimizer, is a:

optimized clock
unoptimized clock
optimized code
unoptimized code

MCQ 29: Delays arising from the use of a load result 1 or 2 cycles after the loads, refer as:

data stall
control stall
branch stall
load stall

MCQ 30: Situations that prevent the next instruction in the instruction stream, from executing during its designated clock cycle are known as:

pipe stage
previous stage
hazards
processor cycle

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