Computer Architecture MCQs – Practice Test 1 (Chapter 5)

Computer Memory Review MCQs with Answers PDF Download – Test 1

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Computer Memory Review MCQs – Practice Test 1 PDF Download

MCQ 1: If a block can be placed at every location in the cache, this cache is said to be:

indirectly mapped
directly mapped
fully associative
partially associative

MCQ 2: The drawback of building a large memory with DRAM is:

the large cost factor
2 dirty bits per block
the inefficient memory organization
the slow speed of operation

MCQ 3: The information when is written in the cache, both to the block in the cache and the block present in the lower-level memory, refers to:

miss rate
write-back
write-through
dirty bit

MCQ 4: The average access time of memory for having memory-hierarchy performance is given as:

average memory access time = hit time + miss rate x miss penalty
average memory access time = hit time + miss rate x miss penalty
average memory access time = hit time + miss rate + miss penalty
average memory access time = hit time + miss rate - miss penalty

MCQ 5: As a segment or a page is normally used for block, page-fault and the address-fault is used for:

hit
miss
cache
stack

Computer Architecture MCQs App & e-Book – Computer Memory Review Study Guide

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