Computer Architecture MCQs – Practice Test 1 (Chapter 15)

Pipelining in Computer Architecture MCQs with Answers PDF Download – Test 1

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Pipelining in Computer Architecture MCQs – Practice Test 1 PDF Download

MCQ 1: By resolving structural hazard, working of the processor becomes:

faster
slower
stalled
large

MCQ 2: Pipelining increases the CPU instruction throughput but it reduces an:

resuming time
terminating time
execution time
none of above

MCQ 3: In the following instruction set DADD R1,R2,R3; DSUB R4,R1,R5; AND R6,R1,R7; OR R8,R1,R9; xOR R10,R1,R11, all the instructions after the DADD use the result of the:

dsub instruction
dadd instruction
and instruction
or instruction

MCQ 4: If any instruction in A1, . . ., A4, D, M1, . . ., M7 has the same register destination as this instruction, then the possible solution is:

stalling the issue of the instruction in id
stalling the issue of the instruction in ex
stalling the issue of the instruction in dec
stalling the issue of the instruction in mem

MCQ 5: The contention for the usage of a hardware device is called:

structural hazard
control hazard
deadlock
data hazard

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