Computer Architecture Exam MCQs – Practice Test 4 (Chapter 5)

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Computer Memory Review MCQs – Practice Test 4 PDF Download

MCQ 16: The field that is not found in page systems, which establishes the upper bound of valid offsets for segments is called:

limit field
valid field
fault bit
frame

MCQ 17: The duration between the read and the MFC signal is:

acess time
latency
delay
cycle time

MCQ 18: A common optimization for reducing write stalls is a:

write buffer
write-back
read stall
write stall

MCQ 19: Address translation cache is referred to as a:

rephrasing
cache buffer
translation buffer
relocation

MCQ 20: Cutting of physical-memory into the form of blocks and allocating them to different processes, the stated technique is known as:

read back
cache miss
cache hit
virtual memory

Computer Memory Review Exam Prep – Computer Architecture Notes App & e-Book

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