Digital Electronics MCQs – Practice Test 8 (Chapter 14)

Latches and Flip Flops Notes Questions with Answers PDF Download – Test 8

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Latches & Flip Flops MCQs – Practice Test 8 PDF Download

MCQ 36: Circuit formed by cross coupling of two NOR gates is called:

latch
SR flip flop
S flip flop
inverter

MCQ 37: When using NAND gate instead of NOR gate in SR flip flop, S and R become active when inputs are:

low
high
infinite
zero

MCQ 38: D flip flop contains:

one clock input
two clock inputs
three clock inputs
four clock inputs

MCQ 39: Timing generators are:

periodic generators
non periodic generators
static generators
sine generators

MCQ 40: Latch is a bistable circuit having:

one complementary output
two complementary outputs
three complementary outputs
four complementary outputs

Latches & Flip Flops Notes App & e-Book – Digital Electronics Admission Tests

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