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Digital Logic Design Entrance Exam MCQs – Mock Test 21

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MCQ 101: Exceeding the maximum load on circuit causes:

  1. malfunction
  2. high performance
  3. low performance
  4. out come

MCQ 102: In Moore models, the output is the function of only:

  1. present state
  2. input state
  3. next state
  4. mid state

MCQ 103: Subtraction of two signed numbers is performed with:

  1. 1's complement
  2. 2's complement
  3. 9's complement
  4. 10's complement

MCQ 104: A binary parallel adder produces the arithmetic sum in:

  1. serial
  2. parallel
  3. sequence
  4. both a and b

MCQ 105: Decoder is a:

  1. combinational circuit
  2. sequential circuit
  3. complex circuit
  4. gate

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