Computer Architecture Competitive Exam MCQs – Mock Test 43

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Virtual Machines Protection MCQs – Mock Test 43 PDF Download

MCQ 211: The procedure to save registers in stack segments is known as:

activation record
procedure frame
queue
both a and b

MCQ 212: There is a cache block of 4words, having a one-word-wide bank of DRAMs and the miss penalty 65, then no of bytes transferred/bus-clock cycle for a single miss will be:

0.2
0.25
0.75
1.5

MCQ 213: The cache with special address translation is referred to as a:

translation look aside bus
translation look aside buffer
transistor look aside buffer
transistor look aside bus

MCQ 214: MIPS architecture provides a separate pair of 32-bit registers to contain the product of 64-bits called:

Hi
Lo
To
both a and b

MCQ 215: The assembly language instruction corresponding to the machine code 00af8020hex is:

sub $s0,$a1,$t7
add $s0,$a1,$t7
mul $s0,$a1,$t7
addi $s0,$a1,$t7

Computer Architecture Notes App & eBook – Virtual Machines Protection Competitive Exam

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