Computer Architecture MCQs – Mock Test 24

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Computer Architecture MCQ – Mock Test 24 PDF Download

MCQ 116: Hazards are eliminated through register renaming by:

renaming all source registers
renaming all destination registers
renaming all memory registers
renaming all data variables

MCQ 117: Assume that the hit-time is single clock cycle, independent of the size of the block, and then 16-byte block in a 4 KB cache will be having access-time of:

6.027 clock cycles
8.077 clock cycles
7.027 clock cycles
8.027 clock cycles

MCQ 118: One successful architecture which is very different from RISC is the:

80x89
80x86
81x86
81x89

MCQ 119: The virtual memory producing the virtual-addresses are translated by:

logical addresses
local addresses
physical addresses
all above

MCQ 120: In the case of dual-port, rack switches operating at an oversubscription rate of:

(1:2)
(20:1)
(3:4)
(10:2)

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