Computer Architecture Practice Test 14

Instruction Level Parallelism MCQ (Multiple Choice Questions) PDF - 14

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Instruction Level Parallelism Questions and Answers PDF Download: Quiz 14

MCQ 66: Redundant array, that is known as mirroring or shadowing is

A) RAID 0

B) RAID 1

C) RAID 2

D) RAID 3

MCQ 67: When instruction i and instruction j tend to write the same register or the memory location, it is called

A) input dependence

B) output dependence

C) ideal pipeline

D) digital call

MCQ 68: All fault-tolerant techniques rely on

A) integrity

B) dependability

C) redundancy

D) corruption

MCQ 69: The pipelining process is also known as

A) pipeline interlock

B) assembly line operation

C) stall interlock

D) stall deadlock

MCQ 70: Register $2 written by subtraction can be written in the instruction

A) sub $4, $1,$3

B) sub $2, $1,$3

C) add $2, $1,$3

D) mul $2, $1,$3

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