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Computer Architecture Practice Test 125

# Pipelining Crosscutting Issues Quiz Questions and Answers PDF - 125

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## Pipelining Crosscutting Issues Quiz Answers : Test 125

MCQ 621: The ratio of cache accesses results in a miss is known as

A) hit miss
B) hit rate
C) file caches
D) miss rate

MCQ 622: Time for replacing the block from memory, is referred to as

A) hit penalty
B) miss penalty
C) hit rate
D) hit miss

MCQ 623: If the buffer is a queue with multiple instructions, it stalls when the queue

A) fills
B) gets empty
C) is half
D) none of above

MCQ 624: Which one of the following statement is true by considering this code DIV.D F0,F2,F4; ADD.D F10,F0,F8; SUB.D F12,F8,F14?

A) SUB.D instruction cannot be executed
B) dependence of ADD.D on DIV.D
C) dependence of DIV.D on ADD.D
D) both a and b

MCQ 625: AMD64 requires that the upper 16 bits of the virtual address be just the sign extension of the lower 48 bits, which it calls

A) rephrasing
B) canonical form
C) Trojan horses
D) block size

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