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Chapter 35: Computer Architecture Practice Tests

Computer Architecture MCQs - Chapter 35

Thread Level Parallelism Multiple Choice Questions (MCQ Quiz) PDF - 1

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Computer Architecture: Thread Level Parallelism MCQs Questions PDF Download

MCQ: When performing a looping operation, the instruction gets stored in the

A) memory
B) cache
C) registers
D) system heap

MCQ: A lock which causes a thread trying to acquire it to simply wait in a loop while repeatedly checking if the lock is available is known as

A) spin locks
B) store locks
C) link locks
D) store operation

MCQ: The conservative memory model that does not allow any instruction reordering on each core, is called

A) sequential consistency
B) random consistency
C) remote node
D) host node

MCQ: Instruction use the same register but no flow of data between them is

A) name dependency
B) control dependency
C) data dependency
D) none of above

MCQ: To update the cached copies of the data item; is the alternative protocol which is known as

A) write update
B) write broadcast protocol
C) read protocol
D) both a and b

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