Computer Science Courses

Chapter 35: Computer Architecture Exam Tests

Computer Architecture MCQs - Chapter 35

Thread Level Parallelism Multiple Choice Questions (MCQs) PDF Download - 1

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Thread Level Parallelism Questions and Answers PDF Download: MCQ Quiz 1

MCQ 1:

When performing a looping operation, the instruction gets stored in the

  1. memory
  2. cache
  3. registers
  4. system heap
MCQ 2:

A lock which causes a thread trying to acquire it to simply wait in a loop while repeatedly checking if the lock is available is known as

  1. spin locks
  2. store locks
  3. link locks
  4. store operation
MCQ 3:

The conservative memory model that does not allow any instruction reordering on each core, is called

  1. sequential consistency
  2. random consistency
  3. remote node
  4. host node
MCQ 4:

Instruction use the same register but no flow of data between them is

  1. name dependency
  2. control dependency
  3. data dependency
  4. none of above
MCQ 5:

To update the cached copies of the data item; is the alternative protocol which is known as

  1. write update
  2. write broadcast protocol
  3. read protocol
  4. both a and b

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Thread Level Parallelism App (Android & iOS)

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Computer Architecture App (Android & iOS)

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Operating Systems App (Android & iOS)

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