Computer Architecture Practice Test 134
Distributed Shared Memory and Coherence MCQs (Multiple Choice Questions) PDF Download - 134
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The MCQs: When the calling procedure saving the registers which it wants to be preserved to access even after the call, is referred to as; "Distributed Shared Memory and Coherence" App (Android, iOS) with answers: callee saving, caller saving, jumps, and calls to study online tutor courses. Practice Computer Architecture and Organization Questions and Answers, Google eBook to download free sample for online computer science and engineering.
Distributed Shared Memory and Coherence MCQ with Answers PDF Download: Quiz 134
When the calling procedure saving the registers which it wants to be preserved to access even after the call, is referred to as
- caller saving
- callee saving
- calls
- jumps
If some combination of instructions cannot be accommodated because of resource conflicts, the processor is said to have a
- data hazard
- structural hazard
- pipeline hazard
- stall
The node which has the memory location and the entry of directory of an address is
- home node
- guest node
- host node
- all above
Architecture accessing memory only with the load instruction and the store instructions, is called
- load-store architecture
- load architecture
- store architecture
- 81x89
Assume that processor has a 1 ns clock cycle and that it uses 4 cycles for ALU operations branches and 5 cycles for memory and the relative frequencies of these operations are 40%, 20%, and 40%, respectively, then the average instruction execution time on the unpipelined processor is
- 4.4 ns
- 4.2 ns
- 3.4 ns
- 3.2 ns
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Distributed Shared Memory and Coherence Practice Tests
- If instruction Add R1, R2, R3 is executed in a system which is pipelined, then value of S is (Where S is a term of Basic performance equation).
- Dividing (1,001,010)10 by (1000)10 will produce reminder of
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