Computer Architecture MCQs – Practice Test 2 (Chapter 10)

Instruction Level Parallelism MCQ with Answers PDF Download – Test 2

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Free Instruction Level Parallelism Study App (iOS & Android) with MCQ: When using Branching, the usual sequencing of the PC is altered. A new instruction is loaded which is called as; with answers: loop target, branch target, forward target, and jump instruction for computing educational growth. Practice Loop Level Parallelism Detection Quiz Questions, download Apple Book (Free Chapter) to develop technical proficiency.

Instruction Level Parallelism MCQ – Practice Test 2 PDF Download

MCQ 6: When using Branching, the usual sequencing of the PC is altered. A new instruction is loaded which is called as:

branch target
loop target
forward target
jump instruction

MCQ 7: While using the iterative construct (Branching) in execution which instruction is used to check the condition:

testandset
testcondn
branch
none of above

MCQ 8: Hazards are eliminated through register renaming by:

renaming all source registers
renaming all destination registers
renaming all memory registers
renaming all data variables

MCQ 9: If straight-line code is generated by un-rolling, then this stated technique is known as:

global scheduling
local scheduling
post scheduling
pre scheduling

MCQ 10: The clock-cycle timings of the processors are 250 PS, 200 PS, and 400 PS, respectively, then it will have the miss penalties as:

200 cycles, 250 cycles, 94 cycles
200 cycles, 350 cycles, 94 cycles
200 cycles, 250 cycles, 100 cycles
300 cycles, 250 cycles, 94 cycles

Computer Architecture Notes App & e-Book – Instruction Level Parallelism Exam Prep

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