Computer Architecture MCQs – Practice Test for Exam Prep

ILP Approaches and Memory System Multiple Choice Questions with Answers – PDF Download

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ILP Approaches and Memory System MCQs PDF Download – Prep Test

MCQ 1: A code of rate m/n has m information bits for (m + n) check bits, such codes are known as:

trellis codes
unillis codes
dillis codes
none of above

MCQ 2: The address spaces are typically broken into the fixed-size blocks, called:

registers
stacks
pages
frames

MCQ 3: Delays arising from the use of a load result 1 or 2 cycles after the loads, refer as:

data stall
control stall
branch stall
load stall

MCQ 4: For implementing the IA-32 instruction set, the framework is provided by:

multicycle data path
microprogrammed controller
hardwired control
both a and b

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