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Computer Architecture MCQs – Mock Test 113

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Computer Architecture: Memory Hierarchy Quiz – Mock Test 113 PDF Download

MCQ 561: The given instruction: L.D F0,0(R1), gets the state of execution in:

  1. 1 iteration
  2. 2 iterations
  3. 3 iterations
  4. 4 iterations

MCQ 562: The time lost due to the branch instruction is often referred to as:

  1. latency
  2. delay
  3. branch penalty
  4. none of above

MCQ 563: How can be the processor's performance calculated?

  1. CPU execution time = (CPU clock cycles - Memory stall cycles) x Clock cycle time
  2. CPU execution time = (CPU clock cycles + memory stall cycles) * clock cycle time
  3. CPU execution time = (CPU clock cycles + memory stall cycles) - clock cycle time
  4. CPU execution time = (CPU clock cycles * memory stall cycles) + clock cycle time

MCQ 564: The PTx instruction having the format: opcode. type d, a, b, c; where d is the:

  1. destination
  2. domain
  3. data
  4. double

MCQ 565: At any instant it is possible to switch from one process to another, this exchange is called a:

  1. process switch
  2. context switch
  3. swapping
  4. both a and b

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