Computer Architecture MCQs – Practice Test for Exam Prep

Memory Technology Review Multiple Choice Questions with Answers – PDF Download

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Memory Technology Review MCQs PDF Download – Prep Test

MCQ 1: Data are allocated to disks in the RAID at the:

block level
cache level
low level
high level

MCQ 2: An obvious and sufficient test for the dependence's absence is the:

gross common divisor (GCD)
greatest commit divisor (GCD)
greatest common division (GCD)
greatest common divisor (GCD)

MCQ 3: In the scheme, named as Tomasulo's scheme, register renaming is done by:

preservatives
tournament predictors
reservation stations
registers

MCQ 4: The power utilization effectiveness would be calculated as:

PUE = (Total facility power)*(IT equipment power)
PUE = (Total facility power)-(IT equipment power)
PUE = (Total facility power) + (IT equipment power)
pue = (total facility power)/(it equipment power)

MCQ 5: The number of bits per second transferred is known as:

bit rate
data rate
hit time
hit miss

Computer Architecture MCQs App & e-Book – Memory Technology Review Practice Tests

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