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Computer Architecture Entrance Tests: Practice Test 2 (Chapter 17)

Processor Datapath and Control Multiple Choice Questions (MCQ) PDF Download - 2

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The Processor Datapath and Control Multiple Choice Questions (MCQ Quiz) with Answers PDF (Processor Datapath and Control MCQ PDF e-Book) download Ch. 17-2 to learn Computer Architecture Course. Solve Google Warehouse Scale Multiple Choice Questions (MCQs), Processor Datapath and Control quiz with answers PDF for online computer classes. The Processor Datapath and Control MCQ App Download: Free Computer Architecture App to learn shared memory architectures, caches performance, virtual machines protection, advanced techniques and speculation career test for online computer engineering programs.

The MCQs: When signals can be read and written is known as; "Processor Datapath and Control" App (Android, iOS) with answers: response time, execution time, delay time, and clocking methodology for online computer classes. Practice Shared Memory Architectures Quiz Questions, download Apple Book (Free Sample) for computer information science.

Processor Datapath and Control MCQs with Answers PDF Download: Quiz 2

MCQ: 6

When signals can be read and written is known as

  1. execution time
  2. response time
  3. delay time
  4. clocking methodology
MCQ: 7

For moving string instruction from the register to the memory, the command used is

  1. MOV
  2. MOVS
  3. MOS
  4. MVS
MCQ: 8

The CPI (Clock per Instruction) is given by the following formula

  1. CPI = CPU clock cycles\Instruction count
  2. CPI = Instruction count
  3. CPI = CPU clock cycles
  4. CPI = CPU clock cycles*Instruction count
MCQ: 9

Undefined instruction can be handled by defining the next-state value, for every op value other than

  1. lw, sw, 0 (r-type),
  2. j
  3. beq
  4. all above
MCQ: 10

In the multi-cycle data-path with exception handled, the clock cycle has

  1. 4 control signals
  2. 8 control signals
  3. 9 control signals
  4. 10 control signals

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