Computer Architecture Certification MCQs – Practice Test 3 (Chapter 17)

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Processor Datapath and Control Quiz – Practice Test 3 PDF Download

MCQ 11: MIPS load word and store word instructions have the general form of:

lw $t1,offset_value($t2)
sw $t1,offset_value($t2)
lw/sw $t1,offset_value($t2)
ld/st $t1,offset_value($t2)

MCQ 12: The processor's general-purpose registers are stored in a structure called a:

queue
register file
stack
memory

MCQ 13: For R-type instruction in the MIPS architecture, ALUOp is:

MCQ 14: Which of the accompanying data holds the data before setting off to the decoder?

control register
data register
accumulator
address register

MCQ 15: For implementing the IA-32 instruction set, the framework is provided by:

multicycle data path
microprogrammed controller
hardwired control
both a and b

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