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Computer Architecture MCQs – Practice Test 2 (Chapter 16)

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Pipelining Performance MCQ – Practice Test 2 PDF Download

MCQ 6: Pipeline stalling is also known as:

  1. load-use
  2. data hazards
  3. bubble
  4. multicycle data path

MCQ 7: The instruction being read from memory using the address placed in the PC and then it is placed in the IF/ID pipeline register in:

  1. instruction fetch stage
  2. instruction decode stage
  3. execution
  4. memory access

MCQ 8: Predicting the branches by using runtime information at runtime is known as:

  1. static branch prediction
  2. dynamic branch prediction
  3. branch prediction
  4. stall prediction

MCQ 9: To discard instructions in the pipeline is referred to as:

  1. load-use
  2. flushing
  3. decoding
  4. discarding

MCQ 10: Delay in finding the proper instruction to fetch is known as control hazard, also referred to as:

  1. structural hazards
  2. data hazards
  3. branch hazard
  4. call hazard

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