Data Level Parallelism and GPU Architecture Learning App | Computer Architecture Notes e-Book PDF

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Computer Architecture Exam MCQs – Practice Test 4 (Chapter 7)

Data Level Parallelism and GPU Architecture Notes Questions with Answers PDF Download – Test 4

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Data Level Parallelism and GPU Architecture MCQs – Practice Test 4 PDF Download

MCQ 16: The on-chip memory which is local to every multithreaded Single Instruction Multiple Data (SIMD) Processor is called:

  1. local memory
  2. global memory
  3. flash memory
  4. stack

MCQ 17: A processor, assigned with a thread block, that executes a code, which we usually call a:

  1. multithreaded DIMS processor
  2. multithreaded SIMD processor
  3. multithreaded queue
  4. multithreaded stack

MCQ 18: A code, known as Grid, which runs on a GPU consisting of a set of:

  1. 32 Thread
  2. unit block
  3. 32 Block
  4. thread block

MCQ 19: The machine object created by the hardware, managing, scheduling, and executing is a thread of:

  1. DIMS instructions
  2. DMM instructions
  3. SIMD instructions
  4. SIM instructions

MCQ 20: When an instruction starts execution and ends execution; between these two times, the instruction is in:

  1. data synchronization
  2. branch synchronization
  3. control synchronization
  4. thread synchronization

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