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Computer Architecture Prep Tests

Computer Architecture Tests

Dynamic Scheduling and Data Hazards MCQ with Answers PDF Download

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Computer Architecture: Dynamic Scheduling and Data Hazards MCQs PDF Download

MCQ: The block frame address is divided into the

A) tag field
B) index field
C) stack field
D) both a and b

MCQ: How many registers does the DMA controller have?

A) 3
B) 2
C) 1
D) 4

MCQ: When the vector gets longer than of its maximum length, then a technique called

A) buffer-grained multithreading
B) control dependences
C) strip cutting
D) strip mining

MCQ: Big Endian byte order putting the byte having address "x . . . x000" at the

A) least significant position
B) middle significant position
C) registry
D) most significant position

MCQ: Make a decision based on the results of the above instruction while it's being executed, is referred to as

A) structural hazards
B) data hazards
C) control hazard
D) pipelining

Practice Tests: Computer Architecture Exam Prep

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