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Digital Logic Design Practice Test 58

Shift Registers Quiz Questions PDF Download - 58

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Logic Design: Shift Registers Quiz PDF Download

MCQ: When the control of shift register labeled as SH/LD =1, it means that the register is

A) shifting
B) storing
C) loading
D) adding

MCQ: In designing combinational circuits, truth table defines the relationship of

A) logical circuit
B) input
C) output
D) input and output

MCQ: The change in state occurs during

A) pulse transition
B) outputs
C) clock pulses
D) inputs

MCQ: How many selected lines does an 8-line to 1-line multiplexer require?

A) 2
B) 3
C) 4
D) 8

MCQ: What is a unit of noise margin?

A) V
B) I
C) S
D) T

Mock Tests: Digital Logic Design Course Prep

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