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Digital Logic Design Certification Course

Digital Logic Design Practice Test 55

# Operator Precedence Quiz Answers PDF - 55

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## Logic Design: Operator Precedence MCQs Quiz

MCQ: Which one of the following symbols represents AND operation?

A) (+)
B) (.)
C) (-)
D) (/)

MCQ: A counter with parallel load can be used to generate several

A) Latches
B) Flip-flops
C) registers
D) counter sequences

MCQ: Full subtract circuits have

A) 3 inputs and 2 outputs
B) 1 input and 1 output
C) both a and b
D) None

MCQ: Up down counters decremented by

A) 1
B) 2
C) 3
D) 4

MCQ: The effect of change in input more than one state is called

A) undefined condition
B) race condition
C) reset condition
D) ideal condition