Computer Science Courses

Computer Architecture Prep Tests

Computer Architecture Tests

Caches and Cache Types MCQ with Answers PDF Download

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Computer Architecture: Caches and Cache Types MCQs PDF Download

MCQ: In a direct-mapped cache of eight words (1)10 ((00001)2) and (29)10 ((11101)2) map to locations

A) (0)10 ((001)2)) and (5)10 ((101)2))
B) (1)10 ((001)2)) and (4)10 ((101)2))
C) (1)10 ((001)2)) and (5)10 ((101)2))
D) (1)10 ((001)2)) and (6)10 ((101)2))

MCQ: The difference between lower level access time and cache access time is called

A) hit time
B) miss rate
C) locality in time
D) miss penalty

MCQ: Which AUx instruction is used that multiply and subtract four packed double-precision operands?

A) VFMSUBPD
B) SUBPD
C) VBROADCASTSD
D) VFMADDPD

MCQ: The Cortex-A8 known as the configurable core, which supports the computer instruction set architecture of

A) armv6
B) armv7
C) armv8
D) armv9

MCQ: Combination of instructions, such as compare the following branch and combining them into a one-operation, is taken by

A) instruction decode
B) instruction fetch
C) macro-op fusion
D) micro-op fusion

Practice Tests: Computer Architecture Exam Prep

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