Computer Architecture Entrance Exam MCQs – Mock Test 5

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Exploiting ILP Using Multiple Issue Quiz – Mock Test 5 PDF Download

MCQ 21: An algorithm for generating software pipelining, which is a way of increasing instruction-level parallelism by interleaving different iterations of an inner loop is known as:

global scheduling
local scheduling
pre scheduling
post scheduling

MCQ 22: Which of the accompanying data holds the data before setting off to the decoder?

control register
data register
accumulator
address register

MCQ 23: When the change in control is unconditional, which control flow is use?

jump
branch
conditional branch
procedure

MCQ 24: The first goal of compiler writers is:

correctness
fast performance
speed computation
data dependence

MCQ 25: The given lines of code temp = v[k]; v[k] = v[k+1]; v[k+1] = temp represents the function of:

factorial
multiplication
sorting
swapping

Exploiting ILP Using Multiple Issue Quiz App & eBook – Computer Architecture Textbook Tests

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