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Computer Architecture Practice Test 147

Logical Instructions Quiz Questions with Answers PDF - 147

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Logical Instructions Trivia Questions PDF Download: Quiz 147

MCQ 731: The technique, in which each block of main memory maps into only one possible cache line is known as

A) indirectly mapping
B) directly mapping
C) cache mapping
D) registers

MCQ 732: When every cache hierarchy level is a subset of level which is further away from the processor, is referred to as

A) multilevel inclusion
B) synchronization
C) atomic synchronization
D) distributors

MCQ 733: The expression srl $$s1,$s2,10 represents the

A) $s1 = $s2 >> 10
B) $s1 = $s2 << 10
C) $s1 = $s2 >> 20
D) $s1 = $s2 << 20

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