Graphics Processing Units Multiple Choice Questions with Answers – PDF Download

MCQ 1: The unit used to load and store instructions in vector architectures is:

1. explicit unit-stride
2. implicit unit-stride
3. control synchronization
4. sim instructions

MCQ 2: Having 32-bit virtual-address, 4 KB pages and 4 bytes/page of the table entry, the total no of page-table size would be:

1. 1mb
2. 2mb
3. 3mb
4. 4mb

MCQ 3: The clock-cycle timings of the processors are 250 PS, 200 PS, and 400 PS, respectively, then it will have the miss penalties as:

1. 200 cycles, 250 cycles, 94 cycles
2. 200 cycles, 350 cycles, 94 cycles
3. 200 cycles, 250 cycles, 100 cycles
4. 300 cycles, 250 cycles, 94 cycles

MCQ 4: In a switch pipeline, a single packet header indicates how to process all of the internal data path physical transfer units also known as:

1. blocks
2. tailer
3. header
4. pits

MCQ 5: The process of letting an instruction move from decode stage into the execution stage of this pipeline is usually called:

1. canceling
2. instruction issue
3. nullifying
4. branch prediction