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Dynamic Logic Circuits Basic Principle MCQs: Questions and Answers PDF Download
In Dynamic logic when clock signal is high, PMOS turned OFF and single NMOS at PDN will
- turned OFF
- turned ON
- doesn't change
- goes to breakdown region
In precharge phase, when capacitor is fully charge it becomes equal to
- input signal
- output signal
- supply voltage
- 2 V
During precharge, PMOS conduct and
- charge capacitance
- discharge capacitance
- charge inductance
- discharge inductance
During evaluation phase, PMOS is
- ON
- OFF
- −∞
- ∞
In Dynamic logic when clock signal is low, PMOS turned ON and this phase is termed as
- precharge phase
- charge phase
- discharge phase
- evaluation phase
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Dynamic Logic Circuits Basic Principle MCQs Book Questions
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