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Free "Dynamic Logic Circuits Basic Principle MCQ" App Download with MCQ: In Dynamic logic when clock signal is high, PMOS turned OFF and single NMOS at PDN will; with answers: turned off, turned on, doesn't change, and goes to breakdown region for engineering learning advancement. Practice Dynamic Logic Circuits Basic Principle Quiz Questions, download Apple Book (Free Chapter) for electronics synchronous learning classes.

Dynamic Logic Circuits Basic Principle MCQs PDF Download – Prep Test

MCQ 1: In Dynamic logic when clock signal is high, PMOS turned OFF and single NMOS at PDN will:

  1. turned OFF
  2. turned ON
  3. doesn't change
  4. goes to breakdown region

MCQ 2: In precharge phase, when capacitor is fully charge it becomes equal to:

  1. input signal
  2. output signal
  3. supply voltage
  4. 2 V

MCQ 3: During precharge, PMOS conduct and:

  1. charge capacitance
  2. discharge capacitance
  3. charge inductance
  4. discharge inductance

MCQ 4: During evaluation phase, PMOS is:

  1. ON
  2. OFF
  3. −∞
  4. ∞

MCQ 5: In Dynamic logic when clock signal is low, PMOS turned ON and this phase is termed as:

  1. precharge phase
  2. charge phase
  3. discharge phase
  4. evaluation phase

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