Digital Electronics MCQs - Chapter 9

Dynamic Logic Circuits Trivia Questions and Answers PDF - 4

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Dynamic Logic Circuits Questions & Answers PDF Download: MCQ Quiz 4

MCQ 16: During evaluation phase, PMOS is

ON
OFF
−∞
∞

MCQ 17: NMOS conducts at input voltage equals to

output voltage
dynamic voltage
ground
threshold voltage

MCQ 18: Approach to solve charge sharing problem is to precharge

internal nodes
external nodes
mid nodes
load capacitor

MCQ 19: Output node of dynamic logic circuit is a

low-impedance node
high-impedance node
zero-impedance node
infinite-impedance node

MCQ 20: At rising edge of clock, output will make

0-1 transition
1-0 transition
z-0 transition
z-1 transition

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