Engineering Courses

Chapter 7: Digital Electronics Exam Tests

Digital Electronics MCQs - Chapter 7

CMOS Logic Gates Circuits Quiz Questions and Answers PDF - 3

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CMOS Logic Gates Circuits Questions & Answers PDF Download: MCQ Quiz 3

MCQ 11: When PDN and PUN are parallel, they form

A) OR gate
B) NOT gate
C) AND gate
D) NAND gate

MCQ 12: By applying De Morgan's law to general exclusive OR gate function, we get output bar(Y)=

A) AB+AB
B) bar(AB)+AB
C) A bar(B)+bar(AB)
D) A bar(B)+bar(A)B

MCQ 13: In NMOS circuit, current flows from

A) drain to source
B) source to drain
C) gate to drain
D) drain to gate

MCQ 14: Transistor which act as pull-down transistor in a CMOS logic gate is

A) BJT
B) PMOS
C) NMOS
D) BiCMOS

MCQ 15: In CMOS NOR gate, PUN PMOS transistors are in

A) series
B) parallel
C) series or parallel
D) random

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CMOS Logic Gates Circuits App (Android & iOS)

CMOS Logic Gates Circuits App (Android & iOS)

Digital Electronics App (Android & iOS)

Digital Electronics App (Android & iOS)

Integrated Circuits App (Android & iOS)

Integrated Circuits App (Android & iOS)

Electric Circuit Analysis App (Android & iOS)

Electric Circuit Analysis App (Android & iOS)