Digital Logic Design MCQs - Chapter 2

Asynchronous Sequential Logic Multiple Choice Questions (MCQs) PDF Download - 5

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Asynchronous Sequential Logic Questions & Answers PDF Download: MCQ Quiz 5

MCQ 21: The effect of change in input more than one state is called

undefined condition
race condition
reset condition
ideal condition

MCQ 22: The change in state occurs during

pulse transition
outputs
clock pulses
inputs

MCQ 23: Asynchronous sequential logic circuit not uses

inputs
outputs
clock pulses
time

MCQ 24: Naming the states is done in

transition table
stable state
flow table
excitation table

MCQ 25: The delay elements provide

large memory
outputs
clock pulses
short term memory

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